Audio

This chapter is designed to assist developers in the progress of porting audio drivers.

Integrating an External Audio Codec

In some cases, customer may want to integrate an external audio codec to the platform. Here will introduce the DAI driver and DAI link, and explain what needs to be done to integrate an external audio codec.

This diagram below describes the relationship between the platform device and the codec device.

../../../../_images/sw_rity_porting-guide_audio_dai_link.svg

DAI link to connect platform and codec

DAI driver is a software component that manages the audio interface and hardware. This driver is responsible for handling the data transfer between the audio processing units and the physical audio interface ports. The DAI driver reads the hardware description from the device tree, this includes information about the hardware interface, clock sources, pin multiplexing, and other platform specific settings.

The DAI link abstracts the relationship between the audio interfaces on the platform side and the audio codec side. It specifies how the two components should interact, including data path, clock information, sample rate, number of channels, and format settings. When an audio stream is initiated, the ALSA framework uses the DAI link configuration to set up the audio path between the platform and codec. The DAI link ensures that both sides are synchronized in terms so that audio data is transmitted without errors and distortion.

The DAI link is defined within the sound card node of the device tree. Here is an example of the DAI link for DL_SRC_BE on Genio 1200-EVK. From codec-0, you can determine that the codec connected to the DL_SRC DAI link is PMIC.

&sound {
    compatible = "mediatek,mt8395-evk";
    model = "mt8395-evk";
    pinctrl-names = "default";
    pinctrl-0 = <&aud_pins_default>;
    status = "okay";

    dai-link-0 {
        sound-dai = <&afe>;
        dai-link-name = "DL_SRC_BE";

        codec-0 {
            sound-dai = <&pmic 0>;
        };
    };

For more details about the DAI link, please refer to the mediatek,mt8395-evk.yaml.

The codec connected by the DAI link may not always be hardware, it could also be software. Let take dai-link-5 in the DTS file as an example, the codec connected to DMIC_BE is dmic_codec. If you take the time to see what dmic_codec is about, you will find that this node is established in mt8195.dtsi It linked to the code dmic.c that actually adds a delay before dmic starts, aiming to prevent performance issues due to hardware not being set up yet.

dai-link-5 {
    sound-dai = <&afe>;
    dai-link-name = "DMIC_BE";

    codec-0 {
        sound-dai = <&dmic_codec>;
    };
};

The actual structure for the DAI link is established within the machine driver.

static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = {

    ...

    [DAI_LINK_DL_SRC_BE] = {
        .name = "DL_SRC_BE",
        .no_pcm = 1,
        .dpcm_playback = 1,
        SND_SOC_DAILINK_REG(DL_SRC_BE),
    },

For more DAI link instances, you can refer to the machine driver: mt8395-evk.c.

To summarize the above content, if you want to integrate an audio codec on the platform, please ensure that the following steps are completed.

  • Add a DTS file for the audio codec

  • Establish a DAI link in the &sound node in the DTS file

  • Connect the DAI link to the backend DAI driver

  • Connect the DAI link to the your codec driver

After completing these steps, your platform should be able to recognize and use the external audio codec for audio processing tasks.

Audio Interfaces

MT8370/MT8390

The following table will show the interfaces present on the SoC MT8370/MT8390.

MT8370/MT8390 Audio Interfaces

Audio Interfaces

Mode

Master/Slave

Sample Rate (kHz)

Channel Count

Maximum Bit Resolution

Front End DAI Name

Back End DAI Name

I2SO1

I2S

Master

8 ~ 192

2

32

DL11_FE

ETDM1_OUT_BE

I2SO1

TDM

Master

8 ~ 48

16

32

DL11_FE

ETDM1_OUT_BE

I2SO2

I2S

Master/Slave

8 ~ 192

8

32

DL11_FE

ETDM2_OUT_BE

I2SO2

TDM

Master/Slave

48

16

32

DL11_FE

ETDM2_OUT_BE

TDM IN

I2S

Master/Slave

8 ~ 192

2

32

UL5_FE

ETDM1_IN_BE

TDM IN

TDM

Master/Slave

48

16

32

UL5_FE

ETDM1_IN_BE

I2S IN

I2S

Master/Slave

8 ~ 192

8

32

UL5_FE

ETDM2_IN_BE

I2S IN

TDM

Master/Slave

8 ~ 48

16

32

UL5_FE

ETDM2_IN_BE

I2S IN

TDM (Direct Path)

Master/Slave

8 ~ 48

16

32

UL5_FE

ETDM2_IN_BE

PMIC DL

8 ~ 192

2

24

DL2_FE

ADDA_BE

PMIC UL

8 ~ 192

2

24

UL4_FE

ADDA_BE

PDM1

Master

8, 16, 32, 48

2

24

UL9_FE

DMIC_BE

PDM2

Master

8, 16, 32, 48

2

24

UL9_FE

DMIC_BE

PDM3

Master

8, 16, 32, 48

2

24

UL9_FE

DMIC_BE

PDM4

Master

8, 16, 32, 48

2

24

UL9_FE

DMIC_BE

PCM (with SRC)

Master

8, 16, 32, 44.1, 48

2

24

DL6_FE/UL2_FE

PCM1_BE

SPDIF OUT

Master

32, 44.1, 48, 88.2, 96, 192

2

24

SPDIF IN

Slave

32, 44.1, 48, 88.2, 96, 176.4, 192

2

24

AUDIO IN

Slave

8 ~ 192

8

24

HDMITX

Master

8 ~ 192

8

32

DL10_FE

ETDM3_OUT_BE

DPTX

Master

8 ~ 192

8

24

DL10_FE

DPTX_BE

MT8371/MT8391

The following table will show the interfaces present on the SoC MT8371/MT8391.

MT8371/MT8391 Audio Interfaces

Audio Interfaces

Mode

Master/Slave

Sample Rate (kHz)

Channel Count

Maximum Bit Resolution

Front End DAI Name

Back End DAI Name

PMIC DL

Master

8 ~ 48

2

24

DL0_FE

ADDA_BE

PMIC UL

Master

8 ~ 48

2

24

UL2_FE

ADDA_BE

PDM0

Master

8 ~ 48

2

24

UL0_FE

AP_DMIC_BE

PDM1

Master

8 ~ 48

2

24

AP_DMIC_CH34_BE

I2SO0

I2S

Master

8 ~ 192

2

32

DL1_FE

I2SOUT0_BE

I2SO1

I2S

Master

8 ~ 192

2

32

DL3_FE

I2SOUT1_BE

I2SIN0

I2S

Master

8 ~ 192

2

32

UL1_FE

I2SIN0_BE

I2SIN1

I2S

Master/Slave

8 ~ 192

2

32

UL3_FE

I2SIN1_BE

PCM

Master

8 ~ 48

2

16

DL2_FE/UL4_FE

PCM_0_BE

DPTX

Master

8 ~ 192

2

24

HDMI_FE

TDM_DPTX_BE

MT8395

The following table will show the interfaces present on the SoC MT8395.

MT8395 Audio Interfaces

Audio Interfaces

Mode

Master/Slave

Sample Rate (kHz)

Channel Count

Maximum Bit Resolution

Front End DAI Name

Back End DAI Name

I2SO1

I2S

Master

8 ~ 384

2

32

DL11_FE

ETDM1_OUT_BE

I2SO1

TDM

Master

8 ~ 48

16

32

DL11_FE

ETDM1_OUT_BE

I2SO2

I2S

Master/Slave

8 ~ 384

8

32

DL11_FE

ETDM2_OUT_BE

I2SO2

TDM

Master/Slave

16

16

32

DL11_FE

ETDM2_OUT_BE

I2SO2

TDM

Master/Slave

48

16

32

DL11_FE

ETDM2_OUT_BE

TDM IN

I2S

Master/Slave

8 ~ 384

2

32

UL5_FE

ETDM1_IN_BE

TDM IN

TDM

Master/Slave

16

16

32

UL5_FE

ETDM1_IN_BE

TDM IN

TDM

Master/Slave

48

16

32

UL5_FE

ETDM1_IN_BE

I2S IN

I2S

Master/Slave

8 ~ 384

8

32

UL5_FE

ETDM2_IN_BE

I2S IN

TDM

Master/Slave

8 ~ 48

16

32

UL5_FE

ETDM2_IN_BE

I2S IN

TDM (Direct Path)

Master/Slave

8 ~ 48

16

32

UL5_FE

ETDM2_IN_BE

PMIC DL

8 ~ 192

2

24

DL2_FE

DL_SRC_BE

PMIC UL

8 ~ 192

2

24

UL4_FE

UL_SRC1_BE/UL_SRC2_BE

PDM1

Master

8, 16, 32, 48

2

24

UL9_FE

DMIC_BE

PDM2

Master

8, 16, 32, 48

2

24

UL9_FE

DMIC_BE

PDM3

Master

8, 16, 32, 48

2

24

UL9_FE

DMIC_BE

PDM4

Master

8, 16, 32, 48

2

24

UL9_FE

DMIC_BE

PCM (with SRC)

Master

8, 16, 32, 44.1, 48

2

24

DL6_FE/UL2_FE

PCM1_BE

SPDIF OUT

Master

32, 44.1, 48, 88.2, 96, 192

2

24

SPDIF IN

Slave

32, 44.1, 48, 88.2, 96, 176.4, 192

2

24

AUDIO IN

Slave

8 ~ 192

8

24

HDMIRX

Slave

192

8

24

UL1_FE

MULTI_IN1_BE

HDMITX

Master

8 ~ 192

8

32

DL10_FE

ETDM3_OUT_BE

DPTX

Master

8 ~ 192

8

24

DL10_FE

DPTX_BE

MT6365

MT6365 is a power management system chip optimized for handsets and smart phones. This codec is used with the MT8370/MT8390, MT8371/MT8391 and MT8395 on the MediaTek platform. The following table will show the interfaces present on the PMIC MT6365.

MT6365 Audio Interfaces

Audio Interfaces

Master/Slave

Sample Rate (kHz)

Channel Count

Maximum Bit Resolution

ACCDET

NA

NA

NA

NA

Playback (Earphone)

Master

8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48, 96, 192

2

24

Playback (Speaker)

Master

8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48, 96, 192

1

24

Record (Earphone)

Master

8, 16, 32, 48, 96, 192

2

24

Record (AMIC)

Master

8, 16, 32, 48, 96, 192

3

24