Genio 520/720-EVK
This chapter describes platform-dependent information and instructions for Genio 520/720-EVK. For example, you will get different benchmark results on different platforms.
For general usage of Ethernet, such as command to configure Dynamic Host Configuration Protocol (DHCP) or static IP and so on, please refer to Ethernet chapter.
Important
All the bash commands shown here use Genio 720-EVK. For Genio 520-EVK, you can follow the same steps and change the naming term from 720 to 520.
Note
This chapter presents test results from IoT Yocto v25.1 and Genio 720-EVK.
Important
A erroneous pre-allocated MAC address was inadvertently configured in mt8189.dtsi in the IoT Yocto v25.1 release.
It will be removed in the next release. Users can remove the line mac-address = [00 55 7b b5 7d f7]; from mt8189.dtsi.
Ethernet Port on Genio 520/720-EVK
The Ethernet interface supports gigabit speed on Genio 520/720-EVK:
Ethernet Port on Genio 520/720-EVK
Enable Ethernet Port on Genio 520/720-EVK
The system enables Ethernet by default. You can check kernel configurations for Ethernet MAC with the following command: zcat /proc/config.gz | grep DWMAC.
You will find the system has enabled the following settings.
zcat /proc/config.gz | grep DWMAC
CONFIG_DWMAC_GENERIC=y
CONFIG_DWMAC_MEDIATEK=y
You can also check kernel log with the following command: dmesg | grep dwmac to confirm it has been probed properly.
dmesg | grep dwmac
dwmac-mediatek 1101a000.ethernet: IRQ eth_lpi not found
dwmac-mediatek 1101a000.ethernet: Cannot get CSR clock
dwmac-mediatek 1101a000.ethernet: User ID: 0x11, Synopsys ID: 0x51
dwmac-mediatek 1101a000.ethernet: DWMAC4/5
dwmac-mediatek 1101a000.ethernet: DMA HW capability register supported
dwmac-mediatek 1101a000.ethernet: RX Checksum Offload Engine supported
dwmac-mediatek 1101a000.ethernet: TX Checksum insertion supported
dwmac-mediatek 1101a000.ethernet: TSO supported
dwmac-mediatek 1101a000.ethernet: Enabled L3L4 Flow TC (entries=4)
dwmac-mediatek 1101a000.ethernet: Enabled RFS Flow TC (entries=10)
dwmac-mediatek 1101a000.ethernet: SPH feature enabled
dwmac-mediatek 1101a000.ethernet: Using 35/40 bits DMA host/device width
dwmac-mediatek 1101a000.ethernet end0: renamed from eth0
dwmac-mediatek 1101a000.ethernet end0: Register MEM_TYPE_PAGE_POOL RxQ-0
dwmac-mediatek 1101a000.ethernet end0: Register MEM_TYPE_PAGE_POOL RxQ-1
dwmac-mediatek 1101a000.ethernet end0: Register MEM_TYPE_PAGE_POOL RxQ-2
dwmac-mediatek 1101a000.ethernet end0: Register MEM_TYPE_PAGE_POOL RxQ-3
dwmac-mediatek 1101a000.ethernet end0: PHY [stmmac-0:00] driver [Airoha AN8801R] (irq=163)
dwmac4: Master AXI performs any burst length
dwmac-mediatek 1101a000.ethernet end0: Enabling Safety Features
dwmac-mediatek 1101a000.ethernet end0: IEEE 1588-2008 Advanced Timestamp supported
dwmac-mediatek 1101a000.ethernet end0: registered PTP clock
dwmac-mediatek 1101a000.ethernet end0: FPE workqueue start
dwmac-mediatek 1101a000.ethernet end0: configuring for phy/rgmii-rxid link mode
dwmac-mediatek 1101a000.ethernet end0: Link is Up - 1Gbps/Full - flow control rx/tx