I2S

The MT8365 audio system provides four I2S interfaces.

• I2SIN 0

• I2SOUT 1

• I2SIN 2

• I2SOUT 3

MT8365 I2S interfaces

ALSA Driver Modification - DTS

Configuring Shared Clock

This guide explains how to configure I2S interfaces with shared clock functionality on the MT8365 platform.

The MT8365 I2S interfaces can be organized into two groups:

• Group 1:

  • I2SOUT 1

  • I2SIN 2

• Group 2:

  • I2SIN 0

  • I2SOUT 3

Each group can be configured to share clock signals (BCK, LRCK, MCLK) between its interfaces.

Shared Clock Configuration

Shared clock configuration is done through the DTS by adding a specific property to the AFE node.

&afe {
    mediatek,i2s-clock-modes = <x y>;
}

This property has two parameters:

• x: Controls clock sharing for group 1 (I2SOUT 1 and I2SIN 2)

• y: Controls clock sharing for group 2 (I2SIN 0 and I2SOUT 3)

Each parameter can be set to:

• 0: Interfaces in the group do not share clocks

• 1: Interfaces in the group share clocks

Note

1. If the property is not specified, no I2S interfaces will share clocks.

2. When clocks are shared, you can choose to use the clock pins from either interface in the group.

3. Data pins must still be configured separately for each interface.

For example, enabling shared clock for group 2 only.

&afe {
    mediatek,i2s-clock-modes = <0 1>;
}

This configuration enables clock sharing between I2SIN 0 and I2SOUT 3, while keeping I2SOUT 1 and I2SIN 2 with independent clocks. With this setting, you can use either of these pin configurations:

• Option 1: Using I2SIN 0 clock pins

  • I2S0_BCK

  • I2S0_LRCK

  • I2S0_DI

  • I2S3_DO

• Option 2: Using I2SOUT 3 clock pins

  • I2S3_BCK

  • I2S3_LRCK

  • I2S0_DI

  • I2S3_DO